The logic switches and memories in most FPGAs are realized by SRAM memory cells, which are loaded appropriately during the boot process. In addition, prototyping boards are used for the development. In addition to graphical input (block and FSM), Active HDL also includes a text editor and the powerful ALDEC simulation environment, which supports all common languages for HDL development. There are suitable solutions for creating and simulating FPGA designs, e.g. This is formulated using a hardware description language (VDHL / Verilog) and translated into a configuration file using logic synthesis, which specifies how the physical elements in the FPGA should be interconnected. The classic programming of ICs or memories differs from the 'programming' of FPGAs, which is actually the creation of the circuit structure of an FPGA. However, the programming is identical.Ī field programmable gate array (FPGA), also called a programmable logic gate, is an integrated circuit of digital technology, in which a logic circuit can be loaded. They are the technological successors of the Programmable Array Logic (PAL) and their structure is simpler than that of the significantly more complex Field Programmable Gate Arrays (FPGAs). Complex Programmable Logic Devices (CPLD) are programmable logic circuits defined in digital technology.
